Linear voltages regulators are used to maintain a constant output voltage. Linear voltage regulators include some form of amplifier, and some include feedback or a feedback loop to control the amplifier to as to maintain a constant output voltage.
Linear voltage regulators are often integrated into various semiconductor devices, such as Micro SD memory devices, SD memory devices, iNAND memory devices, and other memory devices, such as those available from SanDisk Corp. of California. These memory devices may be susceptible small changes or spikes in output voltage of the linear voltage regulator during current transients, such as when a load turns on and begins to draw current and turns off and ceases to draw current.
For example, a current transient load of an internal circuit component may change from an “off” or unloaded state drawing about 1 uA, to an “on” or loaded state drawing about 1 mA. This can cause the output voltage to drop from about 1.20V to about 1.13V. Such a transient or spike in the output voltage can cause a malfunction in the memory circuit in which the linear regulator is supplying regulated voltage.
Memory devices, such as for example, the flash memory devices and other memory devices mentioned above, have been widely adopted for use in consumer products. Flash memory may be found in different forms, for example in the form of a portable memory card that can be carried between host devices or as a solid state drive (SSD) embedded in a host device. Two general memory cell architectures found in flash memory include NOR and NAND. In a typical NOR architecture, memory cells are connected between adjacent bit line source and drain diffusions that extend in a column direction with control gates connected to word lines extending along rows of cells. A memory cell includes at least one storage element positioned over at least a portion of the cell channel region between the source and drain. A programmed level of charge on the storage elements thus controls an operating characteristic of the cells, which can then be read by applying appropriate voltages to the addressed memory cells.
A typical NAND architecture utilizes strings of more than two series-connected memory cells, such as 16 or 32, connected along with one or more select transistors between individual bit lines and a reference potential to form columns of cells. Word lines extend across cells within many of these columns. An individual cell within a column is read and verified during programming by causing the remaining cells in the string to be turned on so that the current flowing through a string is dependent upon the level of charge stored in the addressed cell.
NAND flash memory can be fabricated in the form of single-level cell flash memory, also known as SLC or binary flash, where each cell stores one bit of binary information. NAND flash memory can also be fabricated to store multiple states per cell so that two or more bits of binary information may be stored. This higher storage density flash memory is known as multi-level cell or MLC flash. MLC flash memory can provide higher density storage and reduce the costs associated with the memory. The higher density storage potential of MLC flash tends to have the drawback of less durability than SLC flash in terms of the number write/erase cycles a cell can handle before it wears out. MLC can also have slower read and write rates than the more expensive and typically more durable SLC flash memory. Memory devices, such as SSDs, may include both types of memory.
With respect to conventional memory circuits, and semiconductor devices generally, such devices may use an external type voltage regulator. External type voltage regulators may use a relatively large output capacitor to absorb a transient. This is often disadvantageous because it requires an additional component. Further, use of an external capacitor is not practical when the linear voltage regulator circuit is formed or integrated into a semiconductor circuit. Capacitors of sufficient size can be formed in an integrated circuit, but such fabrication consumes an unacceptable amount of expensive silicon area and is often impractical to implement.